IPC-7351 (formerly IPC-SM-782) is the definitive industry standard for establishing land pattern (solder pad) geometries for surface mount components. It provides a methodology to accommodate different manufacturing densities and process capabilities. The standard reduces tombstoning, poor wetting, and solder bridging by optimizing toe, heel, and side fillets.
If you are using this standard for a new design: IPC 7351.pdf
The (Generic Requirements for Surface Mount Design and Land Pattern Standard) is a foundational document for the electronics industry, providing precise guidelines for designing Surface Mount Technology (SMT) land patterns. Developed by the Institute of Printed Circuits (IPC), it establishes a universal framework to ensure that PCB components are correctly placed, soldered, and maintain high long-term reliability. Core Purpose of IPC-7351 If you are using this standard for a
The standard calculates the toe, heel, and side solder joint dimensions using the component’s physical dimensions (JEDEC standard) plus manufacturing allowances. Here is the simplified logic: Here is the simplified logic: Oversized footprints require
Oversized footprints require more board space, forcing you into a larger (more expensive) PCB panel. Proper density selection saves real money.
| Density Level | Code | Description | Typical Use Case | |---------------|------|-------------|-------------------| | Least (Maximum) | | Maximum heel and toe fillets. | High-reliability (aerospace, medical), low-volume, coarse pitch. | | Nominal (Medium) | N | Balanced fillets. | General purpose commercial electronics. | | Most (Minimum) | M | Minimal toe and heel overhang. | High-density consumer (smartphones, wearables). |